Surface mounting of electronic components is well developed in automated package assembly systems. Integrated circuits are made up of devices such as transistors and diodes and elements such as resistors and capacitors linked together by conductive connections to form one or more functional circuits. The devices are built on wafers, or sheets of silicon with a surface that is subject to a series of fabrication steps to form a pattern of identical integrated circuits separated from each other by a repeating rectangular pattern of scribe lines or saw streets in the surface of the wafer that serve as boundaries between the dice, chip or die. At a late stage in a fabrication process the singulated dice from the wafer is bonded to a substrate to form an IC package.
Conventional flip chip technology generally refers to any assembly where the active side of the integrated circuit die is attached to a package substrate or printed circuit board (collectively referred to as a PCB). Flip chip assemblies can be designed either with or without underfill packaging. In connection with the use of flip chips, the chip is provided with small bumps or balls of solder (hereafter “bumps” or “solder bumps”) positioned in locations on the active side designed to correspond to the recesses on the surface of the circuit board. The chip is mounted by registering the bumps with the board such that the solder bumps become sandwiched between the pads on the board and the corresponding pads on the chip. After flux is applied, heat is applied to the assembly to a point at which the solder is caused to reflow. Upon cooling, the solder hardens, thereby mounting the flip chip to the board's surface. Conventional underfills are used in several distinct approaches and are applied to a mounted chip to provide protection of the chip against chemical attack, moisture, air-borne contaminants, and the like, as well as against mechanical shock, vibration, and temperature cycling encountered in transit as well as use. A conventional capillary flip chip underfill process entails the steps of alignment of chip and circuit board, flux dispensing, solder reflow, flux cleaning, underfill application, underfill flow and curing.
Underfills used in chip packages serve functions to protect the solder joints that interconnect the chip and package or board from environmental factors such as moisture and contaminants and to redistribute mechanical stresses, which in turn increases device lifetime. Protection is provided for the chip against contaminants such as moisture and resulting corrosion of the metal interconnects. However improper selection of adhesives can result in flip chip package failures in several modes, such as shrinkage, delamination, hydrolytic instability, corrosion, and contamination by the underfill.
Chip underfills are designed to avoid imparting stress between the adherends as a result of differential coefficients of thermal expansion between the chip, interconnects, underfill and substrate. Failure modes due to stresses become more prevalent if the substrate is organic and as device size increases. A chip underfill must provide the function of adhering to the substrate, such as a ceramic or organic PCB's (FR4 epoxy, for example), which may or may not be coated with solder mask; metal alloy or organic interconnects; and the integrated circuit die (chip), typically comprised of silicon or other inorganic species and may or may not be coated with a thin passivation layer.
In one of two principle ways to package electronic components, the components are soldered to the same side of the board upon which they are mounted. These devices are said to be “surface-mounted”. Two types of conventional underfills are in practice for use with surface-mounted devices: capillary flow and “no flow” types. Detailed descriptions of these technologies can be found in the literature. For example, see John H. Lau's book Low Cost Flip Chip Technologies for DCA, WLCSP and PBGA Assemblies, McGraw-Hill, 2000. For both of these technologies, heat is typically used to either cure a liquid thermosetting formulation or laminate a solid film into the assembly. Vacuum is sometimes used to remove air voids from the system. The underfill is typically applied on the surface mount (SMT) assembly line for chip in-package or chip on-board. The use of the traditional flow and no-flow underfills requires several steps on the SMT line, and this process is usually the bottleneck on these microelectronics assembly lines.
A representative conventional no-flow underfill is disclosed in U.S. Pat. No. 6,180,696. The underfill material is first dispensed on the substrate or the semiconductor chip followed by solder bump reflowing and underfill encapsulant curing simultaneously. The underfill taught in U.S. Pat. No. 6,180,696 comprises epoxy resin and/or a mixture of epoxy resins, an organic carboxylic acid anhydride hardener, a curing accelerator, a self-fluxing agent, a viscosity-controlling agent, a coupling agent, and a surfactant. The underfill formulations exhibit a curing peak temperature ranging from 180 to 240° C. These underfills must be stored at sub-zero temperatures (° C.) to prevent advancement of cure.
Underfills are distinguished from imageable photoresist materials as patterned formations coated on PC boards, however some similarity lies in the use of ubiquitous epoxy resins. Coatings for photoresist applications are known to employ a photoinitiator to cure in the regions exposed through a mask to activating radiation, and a secondary thermal activated free radical cure component to effect polymerization in unirradiated or shadow areas. One secondary cure mechanism commonly utilized relies upon the addition of a heat-activated peroxide to the formulation; and temperatures in excess of 100° C. are however normally required to initiate peroxide-induced polymerizations, thus precluding use where, for example, heat-sensitive electronic components are involved.
U.S. Pat. No. 5,077,376 discloses epoxy adhesives containing latent thermal curing components. The '376 disclosure teaches the known shelf stability problems of liquid epoxies which led to wide-spread use of epoxy-resin compositions that contain a latent hardener such as dicyandiamide, dibasic acid dihydrazides, boron trifluoride-amine adducts, guanamines, melamines, and the like. However, it is taught that dicyandiamides, dibasic acid dihydrazides and guanamines are defective in that they require high temperatures of 150° C. or higher in order to cure.
U.S. Pat. No. 5,523,443 discloses dual curing conformal coatings, which contain a ultraviolet curable polymerizable system and a moisture curing mechanism. The polymerizable coating system is a one component system comprising at least one alkoxysilyl-urethane-acrylate or methacrylate, an acrylate or methacrylate or vinyl ether diluent, a polymerization initiator of the cationic or free radical photoinitiator type, and a metal catalyst.
U.S. Pat. No. 5,249,101 (IBM, 1993) teaches that the brittleness of protective epoxy coatings for the circuitry on the circuitized surfaces of chip carriers, with moduli of elasticity greater than about 10,000 psi (69 MPa), lead to cracking and delamination. U.S. '101 proposed a coating comprising acrylated urethane oligomer, acrylated monomer and photoinitiator to provide coatings having moduli of elasticity equal to or less than about 10,000 p.s.i. and having chloride ion concentrations less than 10 ppm. Acrylated urethane wafer applied underfill will not survive a solder reflow as it lacks sufficient heat resistance.
U.S. Pat. No. 5,494,981 discloses a curable combination of cycloaliphatic epoxy resin, a cyanate ester resin, optionally a polyol, and, as initiator, a Brönsted acid. When cured, the compositions provide interpenetrating polymer networks (IPNs). The IPNs are useful as high temperature stable vibration damping materials, adhesives, binders for abrasives, and protective coatings.
U.S. Pat. No. 5,672,393 discloses an acrylate encapsulation formulation, which reacts at a high rate of speed, when exposed to radiation inclusive of wave-lengths in the ultraviolet and the visible range, to initially produce a relatively thick skin and to ultimately cure to a relatively low-stress deposit having good physical definition and surface properties. The method entails exposure of the formulation, on an object, to radiation for initiating photopolymerization and thermal polymerization, and the apparatus includes closely juxtaposed actinic radiation and thermal energy sources. The catalyst system includes a photoinitiator component and a thermal initiator component which is responsive to temperatures below 120° C.
U.S. Pat. No. 5,706,579 discloses a method of assembling integrated circuit packages fabricated from a die, printed wiring board and metal lid, using a beta-stageable resin which is preapplied to the lid and which contains a thermally conductive filler material. With the lid in place over the die and substrate board, the package is heated to cause the resin to flow and establish contact with the die. Further heating causes curing of the resin and a permanent thermal bridge between the die and the lid.
U.S. Pat. No. 6,194,788 discloses an integrated thermoplastic, self-fluxing two-part underfill for flip chips. The underfill comprises epoxy resin and acetate diluent with a fluxing type acidic epoxy curative.
U.S. Pat. No. 6,323,062 (Alpha Metals, filed Sep. 14, 1999) discloses a method for applying an solvent-based underfill to a flip chip. The method includes the steps of adhering a bumped wafer to an expandable carrier substrate, first sawing the wafer to form individual chips, stretching the carrier substrate in a bidirectional manner to form channels between each of the individual chips, followed by applying an underfill material to the bumped surfaces of the chips and around the edges of the chips. The underfill materials are not disclosed, but it is taught that the underfill is allowed to dry after coating, followed by cutting the underfill material in the channels between the chips and removing the individual, underfill coated chips from the carrier.
U.S. Pat. No. 6,383,659 discloses b-stage films of a low Tg epoxy-based underfill that contains a thermoplastic polymer having a MW of from 5,000 to 200,000. The '659 patent also teaches that epoxy resin compositions of the self-polymerization type, typically containing imidazoles or phenolic curing types exhibit limited shelf stability, moisture resistance and high-temperature performance of cured compositions, and are difficult to control the progress of the B-stage reaction.
The above prior art exemplifies dual curing approaches to forming coatings, but do not relate to storage of b-stage coating containing a second cure chemistry on fragile substrates such as silicon wafers. Wafer distortion, breakage, and long term ambient storage at temperatures easily reaching about 50° C. are possible in transit or storage, except in controlled environments.
The problems encountered in wafer-applied underfills when the underfill is applied and cured followed by a delay of months until the solder reflow step for a dual-stage curing underfill entails: initial wetting and adhesion of the liquid coating; solidification of the coating at ambient temperatures without delamination from the wafer; long term ambient temperature storage of the coated wafer without loss of re-flow capability from advancement of cure or gel content; avoidance of delamination from the wafer during singulation or dicing; the ability to be stenciled within wafer saw streets; slow onset of thickening during the initial heating from solder reflow; where a surrounding collar is not used, the ability of the underfill to flow out and around the chip forming a fillet; the absence of voids in the underfill after a solder re-flow step; and long-term reliability (defect-free) in devices during their useful service life.
All of these technical problems identified with wafer-applied underfilling for long term storage prior to assembly are not addressed by prior art underfill materials. The objective is therefore to provide materials and methods for decoupling underfill application and flip chip assembly whereby a liquid underfill is coated by conventional coating methods directly to the active side of a large wafer, for example, a wafer having a surface area of 100-500 mm2 and larger, followed by solidification and storage of the coated wafer or diced sections for prolonged periods, such as several months. In this instance, the subsequent wafer attaching processes must avoid problems with respect to the properties of the aged underfill.